From eebcde2557f97158594a906edc9f17aec24978de Mon Sep 17 00:00:00 2001 From: Chandra Sekhar Mahankali Date: Fri, 24 Mar 2023 06:48:32 -0500 Subject: [PATCH 228/296] brcmfmac: do not access D11 SHM and PMU registers for 43022 secure mode deleted empty lines and commented code do not access D11 SHM and PMU registers for 43022 secure mode Signed-off-by: Chandra Sekhar Mahankali --- .../broadcom/brcm80211/brcmfmac/bcmsdh.c | 5 +- .../broadcom/brcm80211/brcmfmac/chip.c | 24 ++- .../broadcom/brcm80211/brcmfmac/sdio.c | 166 ++++++++++-------- 3 files changed, 109 insertions(+), 86 deletions(-) diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c index fb426cfd23ce..747cd6e7f2ed 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/bcmsdh.c @@ -257,11 +257,12 @@ u32 brcmf_sdiod_readl(struct brcmf_sdio_dev *sdiodev, u32 addr, int *ret) if (retval) goto out; + brcmf_dbg(TRACE, "reading from addr 0x%x bar0 0x%08x\n", addr, sdiodev->sbwad); + addr &= SBSDIO_SB_OFT_ADDR_MASK; addr |= SBSDIO_SB_ACCESS_2_4B_FLAG; data = sdio_readl(sdiodev->func1, addr, &retval); - out: if (ret) *ret = retval; @@ -278,6 +279,8 @@ void brcmf_sdiod_writel(struct brcmf_sdio_dev *sdiodev, u32 addr, if (retval) goto out; + brcmf_dbg(TRACE, "writing %d to addr 0x%x bar0 0x%08x\n", data, addr, sdiodev->sbwad); + addr &= SBSDIO_SB_OFT_ADDR_MASK; addr |= SBSDIO_SB_ACCESS_2_4B_FLAG; diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c index f2837f3a92e9..86beb63408cc 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/chip.c @@ -1070,6 +1070,10 @@ static void brcmf_blhs_init(struct brcmf_chip *pub) chip = container_of(pub, struct brcmf_chip_priv, pub); addr = pub->blhs->h2d; + brcmf_dbg(TRACE, + "h2d value before initing: 0x%08x (addr 0x%08x)\n", + pub->blhs->read(chip->ctx, addr), + addr); pub->blhs->write(chip->ctx, addr, 0); } @@ -1080,15 +1084,19 @@ static int brcmf_blhs_is_bootloader_ready(struct brcmf_chip_priv *chip) addr = chip->pub.blhs->d2h; SPINWAIT_MS((chip->pub.blhs->read(chip->ctx, addr) & - BRCMF_BLHS_D2H_READY) == 0, - BRCMF_BLHS_D2H_READY_TIMEOUT, BRCMF_BLHS_POLL_INTERVAL); + BRCMF_BLHS_D2H_READY) == 0, + BRCMF_BLHS_D2H_READY_TIMEOUT, + BRCMF_BLHS_POLL_INTERVAL); regdata = chip->pub.blhs->read(chip->ctx, addr); if (!(regdata & BRCMF_BLHS_D2H_READY)) { - brcmf_err("Timeout waiting for bootloader ready\n"); + brcmf_err("Timeout waiting for bootloader ready, waittime %d ms addr 0x%x\n", + BRCMF_BLHS_D2H_READY_TIMEOUT, + addr); return -EPERM; + } else { + brcmf_dbg(TRACE, "bootloader is ready\n"); } - return 0; } @@ -1229,14 +1237,15 @@ static int brcmf_blhs_chk_validation(struct brcmf_chip *pub) chip = container_of(pub, struct brcmf_chip_priv, pub); addr = pub->blhs->d2h; SPINWAIT_MS((pub->blhs->read(chip->ctx, addr) & - BRCMF_BLHS_D2H_VALDN_DONE) == 0, + BRCMF_BLHS_D2H_VALDN_DONE) == 0, BRCMF_BLHS_D2H_VALDN_DONE_TIMEOUT, BRCMF_BLHS_POLL_INTERVAL); regdata = pub->blhs->read(chip->ctx, addr); if (!(regdata & BRCMF_BLHS_D2H_VALDN_DONE) || !(regdata & BRCMF_BLHS_D2H_VALDN_RESULT)) { - brcmf_err("TRX image validation check failed\n"); + brcmf_err("TRX image validation check failed, timeout %d\n", + BRCMF_BLHS_D2H_VALDN_DONE_TIMEOUT); /* Host notification for bootloader to get reset on error */ addr = pub->blhs->h2d; @@ -1245,8 +1254,9 @@ static int brcmf_blhs_chk_validation(struct brcmf_chip *pub) pub->blhs->write(chip->ctx, addr, regdata); return -EPERM; + } else { + brcmf_dbg(INFO, "TRX Image validation check completed successfully\n"); } - return 0; } diff --git a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c index f5628cea1db7..ea4f8a20a9fd 100644 --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c @@ -1268,13 +1268,17 @@ static int brcmf_sdio_readshared(struct brcmf_sdio *bus, * for host. Host can only read/write (384Kb-512Kb) RAM area. * Read block is controlled by OTP bit. */ - if (bus->ci->blhs && (bus->ci->chip == CY_CC_43022_CHIP_ID)) + if (bus->ci->blhs && bus->ci->chip == CY_CC_43022_CHIP_ID) { shaddr = bus->ci->rambase + CM3_SOCRAM_WRITE_END_LOCATION - 4; - else + } else { shaddr = bus->ci->rambase + bus->ci->ramsize - 4; + /* can't access PMU register in 43022 and bus->ci->srsize is zero + * for 43022. So, skip the below statement for 43022. + */ + if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci)) + shaddr -= bus->ci->srsize; + } - if (!bus->ci->rambase && brcmf_chip_sr_capable(bus->ci)) - shaddr -= bus->ci->srsize; rv = brcmf_sdiod_ramrw(bus->sdiodev, false, shaddr, (u8 *)&addr_le, 4); if (rv < 0) @@ -1310,6 +1314,8 @@ static int brcmf_sdio_readshared(struct brcmf_sdio *bus, sh->console_addr = le32_to_cpu(sh_le.console_addr); sh->msgtrace_addr = le32_to_cpu(sh_le.msgtrace_addr); + brcmf_dbg(INFO, "rte_console address is is 0x%08x\n", sh->console_addr); + if ((sh->flags & SDPCM_SHARED_VERSION_MASK) > SDPCM_SHARED_VERSION) { brcmf_err("sdpcm shared version unsupported: dhd %d dongle %d\n", SDPCM_SHARED_VERSION, @@ -1385,9 +1391,8 @@ static u32 brcmf_sdio_hostmail(struct brcmf_sdio *bus, u32 *hmbd) (hmb_data & HMB_DATA_VERSION_MASK) >> HMB_DATA_VERSION_SHIFT; if (bus->sdpcm_ver != SDPCM_PROT_VERSION) - brcmf_err("Version mismatch, dongle reports %d, " - "expecting %d\n", - bus->sdpcm_ver, SDPCM_PROT_VERSION); + brcmf_err("ver mismatch, %d, expecting %d, hmb_data 0x%x\n", + bus->sdpcm_ver, SDPCM_PROT_VERSION, hmb_data); else brcmf_dbg(SDIO, "Dongle ready, protocol version %d\n", bus->sdpcm_ver); @@ -3057,83 +3062,91 @@ brcmf_sdio_ulp_pre_redownload_check(struct brcmf_sdio *bus, u32 hmb_data) brcmf_dbg(ULP, "GOT THE INTERRUPT FROM UCODE\n"); sdiod->ulp = true; fmac_ulp->ulp_state = FMAC_ULP_TRIGGERED; - ulp_wake_ind = D11SHM_RDW(sdiod, - M_ULP_WAKE_IND(sdiod->fmac_ulp), - &err); - wowl_wake_ind = D11SHM_RDW(sdiod, - M_WAKEEVENT_IND(sdiod->fmac_ulp), - &err); - brcmf_dbg(ULP, "wowl_wake_ind: 0x%08x, ulp_wake_ind: 0x%08x state %s\n", - wowl_wake_ind, ulp_wake_ind, (fmac_ulp->ulp_state) ? - "DS1 Exit Triggered" : "IDLE State"); + /* D11 SHM and PMU can not be accessed from host in case of 43022. + * so, this logic may have to be moved to DS2 FW. Until then, skip it + * for DS2. + */ + if (bus->ci->chip != CY_CC_43022_CHIP_ID) { + ulp_wake_ind = D11SHM_RDW(sdiod, + M_ULP_WAKE_IND(sdiod->fmac_ulp), + &err); + wowl_wake_ind = D11SHM_RDW(sdiod, + M_WAKEEVENT_IND(sdiod->fmac_ulp), + &err); - if (wowl_wake_ind || ulp_wake_ind) { - /* RX wake Don't do anything. - * Just bail out and re-download firmware. - */ - /* Print out PHY TX error block when bit 9 set */ - if ((ulp_wake_ind & C_DS1_PHY_TXERR) && - M_DS1_PHYTX_ERR_BLK(sdiod->fmac_ulp)) { - brcmf_err("Dump PHY TX Error SHM Locations\n"); - for (i = 0; i < PHYTX_ERR_BLK_SIZE; i++) { - pr_err("0x%x", - D11SHM_RDW(sdiod, - (M_DS1_PHYTX_ERR_BLK(sdiod->fmac_ulp) + - (i * 2)), &err)); + brcmf_dbg(ULP, "wowl_wake_ind: 0x%08x, ulp_wake_ind: 0x%08x state %s\n", + wowl_wake_ind, ulp_wake_ind, (fmac_ulp->ulp_state) ? + "DS1 Exit Triggered" : "IDLE State"); + + if (wowl_wake_ind || ulp_wake_ind) { + /* RX wake Don't do anything. + * Just bail out and re-download firmware. + */ + /* Print out PHY TX error block when bit 9 set */ + if ((ulp_wake_ind & C_DS1_PHY_TXERR) && + M_DS1_PHYTX_ERR_BLK(sdiod->fmac_ulp)) { + brcmf_err("Dump PHY TX Error SHM Locations\n"); + for (i = 0; i < PHYTX_ERR_BLK_SIZE; i++) { + u32 tx_err; + + tx_err = D11SHM_RDW(sdiod, + (M_DS1_PHYTX_ERR_BLK(sdiod->fmac_ulp) + + (i * 2)), &err); + pr_err("0x%x", tx_err); + } + brcmf_err("\n"); } - brcmf_err("\n"); - } - } else { - /* TX wake negotiate with MAC */ - brcmf_dbg(ULP, "M_DS1_CTRL_SDIO: 0x%08x\n", - (u32)D11SHM_RDW(sdiod, - M_DS1_CTRL_SDIO(sdiod->fmac_ulp), - &err)); - val32 = D11SHM_RD(sdiod, + } else { + /* TX wake negotiate with MAC */ + brcmf_dbg(ULP, "M_DS1_CTRL_SDIO: 0x%08x\n", + (u32)D11SHM_RDW(sdiod, M_DS1_CTRL_SDIO(sdiod->fmac_ulp), - &err); - D11SHM_WR(sdiod, M_DS1_CTRL_SDIO(sdiod->fmac_ulp), - val32, (C_DS1_CTRL_SDIO_DS1_EXIT | - C_DS1_CTRL_REQ_VALID), &err); - val32 = D11REG_RD(sdiod, D11_MACCONTROL_REG, &err); - val32 = val32 | D11_MACCONTROL_REG_WAKE; - D11REG_WR(sdiod, D11_MACCONTROL_REG, val32, &err); - - /* Poll for PROC_DONE to be set by ucode */ - value = D11SHM_RDW(sdiod, - M_DS1_CTRL_SDIO(sdiod->fmac_ulp), - &err); - /* Wait here (polling) for C_DS1_CTRL_PROC_DONE */ - timeout = jiffies + ULP_HUDI_PROC_DONE_TIME; - while (!(value & C_DS1_CTRL_PROC_DONE)) { + &err)); + val32 = D11SHM_RD(sdiod, + M_DS1_CTRL_SDIO(sdiod->fmac_ulp), + &err); + D11SHM_WR(sdiod, M_DS1_CTRL_SDIO(sdiod->fmac_ulp), + val32, (C_DS1_CTRL_SDIO_DS1_EXIT | + C_DS1_CTRL_REQ_VALID), &err); + val32 = D11REG_RD(sdiod, D11_MACCONTROL_REG, &err); + val32 = val32 | D11_MACCONTROL_REG_WAKE; + D11REG_WR(sdiod, D11_MACCONTROL_REG, val32, &err); + + /* Poll for PROC_DONE to be set by ucode */ value = D11SHM_RDW(sdiod, M_DS1_CTRL_SDIO(sdiod->fmac_ulp), &err); - if (time_after(jiffies, timeout)) - break; - usleep_range(1000, 2000); - } - brcmf_dbg(ULP, "M_DS1_CTRL_SDIO: 0x%08x\n", - (u32)D11SHM_RDW(sdiod, - M_DS1_CTRL_SDIO(sdiod->fmac_ulp), &err)); - value = D11SHM_RDW(sdiod, - M_DS1_CTRL_SDIO(sdiod->fmac_ulp), - &err); - if (!(value & C_DS1_CTRL_PROC_DONE)) { - brcmf_err("Timeout Failed to enter DS1 Exit state!\n"); - return false; + /* Wait here (polling) for C_DS1_CTRL_PROC_DONE */ + timeout = jiffies + ULP_HUDI_PROC_DONE_TIME; + while (!(value & C_DS1_CTRL_PROC_DONE)) { + value = D11SHM_RDW(sdiod, + M_DS1_CTRL_SDIO(sdiod->fmac_ulp), + &err); + if (time_after(jiffies, timeout)) + break; + usleep_range(1000, 2000); + } + brcmf_dbg(ULP, "M_DS1_CTRL_SDIO: 0x%08x\n", + (u32)D11SHM_RDW(sdiod, + M_DS1_CTRL_SDIO(sdiod->fmac_ulp), &err)); + value = D11SHM_RDW(sdiod, + M_DS1_CTRL_SDIO(sdiod->fmac_ulp), + &err); + if (!(value & C_DS1_CTRL_PROC_DONE)) { + brcmf_err("Timeout Failed to enter DS1 Exit state!\n"); + return false; + } } - } - ulp_wake_ind = D11SHM_RDW(sdiod, - M_ULP_WAKE_IND(sdiod->fmac_ulp), - &err); - wowl_wake_ind = D11SHM_RDW(sdiod, - M_WAKEEVENT_IND(sdiod->fmac_ulp), - &err); - brcmf_dbg(ULP, "wowl_wake_ind: 0x%08x, ulp_wake_ind: 0x%08x\n", - wowl_wake_ind, ulp_wake_ind); + ulp_wake_ind = D11SHM_RDW(sdiod, + M_ULP_WAKE_IND(sdiod->fmac_ulp), + &err); + wowl_wake_ind = D11SHM_RDW(sdiod, + M_WAKEEVENT_IND(sdiod->fmac_ulp), + &err); + brcmf_dbg(ULP, "wowl_wake_ind: 0x%08x, ulp_wake_ind: 0x%08x\n", + wowl_wake_ind, ulp_wake_ind); /* skip setting min resource mask for secure chip */ if (bus->ci->chip != CY_CC_43022_CHIP_ID) { @@ -3144,7 +3157,6 @@ brcmf_sdio_ulp_pre_redownload_check(struct brcmf_sdio *bus, u32 hmb_data) if (err) brcmf_err("min_res_mask failed\n"); } - return true; } @@ -4061,7 +4073,6 @@ static int brcmf_sdio_download_firmware(struct brcmf_sdio *bus, brcmf_fw_nvram_free(nvram); goto err; } - bcmerror = bus->ci->blhs->chk_validation(bus->ci); if (bcmerror) { brcmf_err("FW validation failed, err=%d\n", bcmerror); @@ -5378,7 +5389,6 @@ static void brcmf_sdio_firmware_callback(struct device *dev, int err, sdio_disable_func(sdiod->func2); goto checkdied; } - if (brcmf_chip_sr_capable(bus->ci)) { brcmf_sdio_sr_init(bus); } else { -- 2.25.1